Routing algorithms in networks-on-chip /
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Imprint: | New York : Springer, ©2014. |
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Description: | 1 online resource (411 pages) |
Language: | English |
Subject: | |
Format: | E-Resource Book |
URL for this record: | http://pi.lib.uchicago.edu/1001/cat/bib/11081737 |
Table of Contents:
- Basic Concepts on On-Chip Networks / Masoud Danashtalab and Maurizio Palesi
- Part I: Performance Improvement
- A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs / Abbas Eslami Kiasari, Axel Jantsch and Zhonghai Lu
- Run-Time Deadlock Detection / Ra'ed Al-Dujaily, Terrence Mak, Fei Xia, Alex Yakovlev and Maurizio Palesi
- The Abacus Turn Model / Binzhang Fu, Yinhe Han, Huawei Li and Xiaowei Li
- Learning-Based Routing Algorithms for On-Chip Networks / Masoumeh Ebrahimi and Masoud Daneshtalab
- Part II: Multicast Communication
- Efficient and Deadlock-Free Tree-Based Multicast Routing Methods for Networks-on-Chip (NoC) / Faizal Arya Samman and Thomas Hollstein
- Path-Based Multicast Routing for 2D and 3D Mesh Networks / Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila and Hannu Tenhunen
- Part III: Fault Tolerance and Reliability
- Fault-Tolerant Routing Algorithms in Networks On-Chip / Reyhaneh Jabbarvand Behrouz, Mehdi Modarressi and Hamid Sarbazi-Azad
- Reliable and Adaptive Routing Algorithms for 2D and 3D Networks-on-Chip / Masoumeh Ebrahimi
- Part IV: Power/Energy and Thermal Issues
- Bufferless and Minimally-Buffered Deflection Routing / Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun and Onur Mutlu
- A Thermal Aware Routing Algorithm for Application-Specific Network-on-Chip / Zhiliang Qian and Chi-Ying Tsui
- Part V: Emerging Technologies
- Traffic- and Thermal-Aware Routing Algorithms for 3D Network-on-Chip (3D NoC) Systems / Kun-Chih Chen, Chih-Hao Chao, Shu-Yen Lin and An-Yeu (Andy) Wu
- Scalable Architecture for All-Optical Wavelength-Routed Networks-on-Chip / Somayyeh Koohi and Shaahin Hessabi
- Part VI: Industrial Case Study
- On Chip Network Routing for Tera-Scale Architectures / Aniruddha S. Vaidya, Mani Azimi and Akhilesh Kumar.