Security and fault tolerance in internet of things /

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Bibliographic Details
Imprint:Cham : Springer, [2019]
Description:1 online resource (221 pages)
Language:English
Series:Internet of Things: Technology, communications and computing
Internet of things.
Subject:
Format: E-Resource Book
URL for this record:http://pi.lib.uchicago.edu/1001/cat/bib/11761601
Hidden Bibliographic Details
Other authors / contributors:Chakraborty, Rajat Subhra, editor.
Mathew, Jimson, editor.
Vasilakos, Athanasios, editor.
ISBN:9783030028077
3030028070
9783030028060
3030028062
9783030028084
3030028089
Digital file characteristics:text file PDF
Notes:Online resource; title from digital title page (viewed on January 30, 2019).
Summary:This book covers various aspects of security, privacy and reliability in Internet of Things (IoT) and Cyber-Physical System design, analysis and testing. In particular, various established theories and practices both from academia and industry are presented and suitably organized targeting students, engineers and researchers. Fifteen leading academicians and practitioners wrote this book, pointing to the open problems and biggest challenges on which research in the near future will be focused.
Other form:Print version: Chakraborty, Rajat Subhra. Security and Fault Tolerance in Internet of Things. Cham : Springer, ©2018 9783030028060
Standard no.:10.1007/978-3-030-02807-7
10.1007/978-3-030-02
Table of Contents:
  • Security and trust verification of IoT SoCs
  • Low cost dual-phase watermark for protecting CE devices in IoT framework
  • Secure multicast communication techniques for IoT
  • An adaptable system-on-chip security architecture for Internet of Things applications
  • Lightweight fault tolerance for secure aggregation of homomorphic data
  • An approach to integrating security and fault tolerance mechanisms into the military IoT
  • Fault -tolerant implementations of physically unclonable functions of FPGA
  • Fault tolerance in 3D-ICs
  • Formal verification for security in IoT devices
  • SENSE: sketching framework for big data acceleration on low power embedded cores.