Languages, design methods, and tools for electronic system design : selected contributions from FDL 2018 /

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Bibliographic Details
Meeting name:FDL (Conference) (2018 : Munich, Germany)
Imprint:Cham : Springer, 2020.
Description:1 online resource (197 pages)
Language:English
Series:Lecture Notes in Electrical Engineering Ser. ; v. 611
Lecture notes in electrical engineering ; v. 611.
Subject:
Format: E-Resource Book
URL for this record:http://pi.lib.uchicago.edu/1001/cat/bib/12602910
Hidden Bibliographic Details
Varying Form of Title:FDL 2018
Other authors / contributors:Kaźmierski, Thomas J.
Steinhorst, Sebastian.
Grosse, Daniel.
ISBN:9783030315856
3030315851
9783030315849
Notes:4.3 Overhead Consideration
Includes index.
Print version record.
Summary:This book brings together a selection of the best papers from the twenty-first edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 10-12, 2018, in Munich, Germany. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers Assertion Based Design, Verification & Debug; Includes language-based modeling and design techniques for embedded systems; Covers design, modeling and verification of mixed physical domain and mixed signal systems that include significant analog parts in electrical and non-electrical domains; Includes formal and semi-formal system level design methods for complex embedded systems based on the Unified Modelling Language (UML) and Model Driven Engineering (MDE).
Other form:Print version: Kazmierski, Tom J. Languages, Design Methods, and Tools for Electronic System Design : Selected Contributions from FDL 2018. Cham : Springer, ©2020 9783030315849
Standard no.:10.1007/978-3-030-31
Table of Contents:
  • Intro
  • Preface
  • Contents
  • Time in SCCharts
  • 1 Introduction
  • 1.1 Contributions and Outline
  • 2 Timed Automata in SCCharts
  • 2.1 The Traffic Light Controller Example
  • 2.2 Requirements for Time in SCCharts
  • 2.3 From Specification to Behavior: The Eager Semantics
  • 2.4 Timed SCCharts
  • 3 When to React?
  • 3.1 Event-Triggered Execution
  • 3.2 Time-Triggered Execution
  • 3.3 The Multiform Notion of Time
  • 3.4 Dynamic Ticks
  • 4 Dynamic Ticks in SCCharts
  • 4.1 The Traffic Light Controller with Dynamic Ticks
  • 4.2 How to Compute Sleep Times
  • 4.3 Hard vs. Soft Bounds: The Greedy Semantics
  • 4.4 Hard vs. Soft Resets: Managing Time
  • 5 Multiclock SCCharts
  • 5.1 The Motor Example
  • 6 Extension with Clock Patterns
  • 7 Related Work
  • 8 Conclusions and Outlook
  • References
  • Generation of Functional Mockup Units for Transactional Cyber-Physical Virtual Platforms
  • 1 Introduction
  • 2 Background and Related Work
  • 2.1 fmi Standard 2.0 for Co-simulation
  • 2.2 Simulation Coordination in the fmi Standard
  • 2.3 Related Work
  • 3 FMI Standard Advantages and Limitations
  • 4 Methodology
  • 4.1 fmu Generation and Timing Backward Propagation
  • 4.2 A Better Coordinator for Discrete Systems
  • 5 Methodology Application
  • 6 Recent Development and Discussion
  • 7 Concluding Remarks
  • References
  • Safe Interoperability for Web of Things Devices and Systems
  • 1 Introduction
  • 2 Thing Description
  • 3 Describing Sequential Behavior
  • 3.1 Describing Sequential Behavior in a Single Thing
  • 3.2 Composing a System
  • 3.3 Worldwide Scalability
  • 4 Case Study: Testing with Path Semantics
  • 4.1 Single Thing Testing
  • 4.2 System Level Testing
  • 5 Related Work
  • 6 Discussion
  • 7 Conclusion
  • References
  • Automatic Design of Microfluidic Devices: An Overview of Platforms and Corresponding Design Tasks
  • 1 Introduction
  • 2 Electrowetting-Based Microfluidic Devices
  • 2.1 The Platform
  • 2.2 The Design Process
  • 3 Flow-Based Microfluidic Devices
  • 3.1 The Platform
  • 3.2 The Design Process
  • 4 Passive Routing Concepts for Microfluidic Devices
  • 4.1 The Platform
  • 4.2 The Design Process
  • 5 Conclusions
  • References
  • A New Ageing-Aware Approach via Path Isolation
  • 1 Introduction
  • 2 BTI Effect and Delay Degradation
  • 2.1 Transistor-Level BTI Modelling
  • 2.2 Circuit-Level BTI Degradations
  • 3 Proposed Ageing-Aware Approach
  • 3.1 Motivational Example
  • 3.2 Algorithm for Path Isolation
  • 4 Case Study of a FIR Filter
  • 4.1 VLSI Implementation
  • 4.2 Experimental Results
  • 5 Conclusion
  • References
  • SystemC Coding Guideline for Faster Out-of-Order Parallel Discrete Event Simulation
  • 1 Introduction
  • 1.1 Related Work
  • 2 SG Granularity and Simulation Speed
  • 3 Recoding Infrastructure for SystemC
  • 3.1 Segment Graph
  • 3.2 Data and Event Conflicts
  • 4 Proposed Coding Guideline
  • 4.1 Estimation for Level of Parallelism
  • 4.2 Motivation