Cryptographic hardware and embedded systems--CHES 2002 : 4th international workshop, Redwood Shores, CA, USA, August 2002 : revised papers /
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| Meeting name: | CHES (Workshop (4th : 2002 : Redwood Shores, Calif.) |
|---|---|
| Imprint: | Berlin ; New York : Springer-Verlag, c2003. |
| Description: | xiv, 612 p. : ill. ; 24 cm. |
| Language: | English |
| Series: | Lecture notes in computer science ; 2523 |
| Subject: | |
| Format: | E-Resource Print Book |
| URL for this record: | http://pi.lib.uchicago.edu/1001/cat/bib/4815234 |
Table of Contents:
- Invited Talk
- CHES: Past, Present, and Future
- Attack Strategies
- Optical Fault Induction Attacks
- Template Attacks
- The EM Side Channel(s)
- Finite Field and Modular Arithmetic I
- Enhanced Montgomery Multiplication
- New Algorithm for Classical Modular Inverse
- Increasing the Bitlength of a Crypto-Coprocessor
- Elliptic Curve Cryptography I
- Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems
- Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks
- Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor
- Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA
- AES and AES Candidates
- 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis
- Efficient Software Implementation of AES on 32-Bit Platforms
- An Optimized S-Box Circuit Architecture for Low Power AES Design
- Simplified Adaptive Multiplicative Masking for AES
- Multiplicative Masking and Power Analysis of AES
- Tamper Resistance
- Keeping Secrets in Hardware: The Microsoft Xbox TM Case Study
- RSA Implementation
- A DPA Attack against the Modular Reduction within a CRT Implementation of RSA
- Further Results and Considerations on Side Channel Attacks on RSA
- Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures
- Finite Field and Modular Arithmetic II
- Some Security Aspects of the MIST Randomized Exponentiation Algorithm
- The Montgomery Powering Ladder
- DPA Countermeasures by Improving the Window Method
- Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions
- Elliptic Curve Cryptography II
- On the Efficient Generation of Elliptic Curves over Prime Fields
- An End-to-End Systems Approach to Elliptic Curve Cryptography
- A Low-Power Design for an Elliptic Curve Digital Signature Chip
- A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over {{\op GF}}(2^n)
- Genus Two Hyperelliptic Curve Coprocessor
- Random Number Generation
- True Random Number Generator Embedded in Reconfigurable Hardware
- Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications
- A Hardware Random Number Generator
- Invited Talk
- RFID Systems and Security and Privacy Implications
- New Primitives
- A New Class of Invertible Mappings
- Finite Field and Modular Arithmetic II
- Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2 n )
- Dual-Field Arithmetic Unit for GF(p) and GF(2 m )
- Error Detection in Polynomial Basis Multipliers over Binary Extension Fields
- Hardware Implementation of Finite Fields of Characteristic Three
- Elliptic Curve Cryptography III
- Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication
- Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks
- Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick
- Hardware for Cryptanalysis
- Experience Using a Low-Cost FPGA Design to Crack DES Keys
- A Time-Memory Tradeoff Using Distinguished Points: New Analysis & FPGA Results
- Author Index
