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LEADER |
00000cam a2200000Ia 4500 |
001 |
8896345 |
003 |
ICU |
005 |
20120829144000.0 |
006 |
m d |
007 |
cr cn| |
008 |
101123s2010 nyua ob 001 0 eng d |
016 |
7 |
|
|a 015612518
|2 Uk
|
020 |
|
|
|a 9781441966001 (electronic bk.)
|
020 |
|
|
|a 1441966005 (electronic bk.)
|
020 |
|
|
|z 9781441965998
|
020 |
|
|
|z 1441965998
|
035 |
|
|
|a (OCoLC)682910950
|
037 |
|
|
|a 978-1-4419-6599-8
|b Springer
|n http://www.springerlink.com
|
040 |
|
|
|a GW5XE
|b eng
|c GW5XE
|d OCLCQ
|d HNK
|d UKMGB
|d N$T
|d COO
|d RRP
|
049 |
|
|
|a CGUA
|
072 |
|
7 |
|a TEC
|x 008010
|2 bisacsh
|
072 |
|
7 |
|a TEC
|x 008020
|2 bisacsh
|
082 |
0 |
4 |
|a 621.381548
|2 22
|
090 |
|
|
|a TK7874.58
|b .P69 2010
|
245 |
0 |
4 |
|a The power of assertions in SystemVerilog /
|c Eduard Cerny ... [et al.].
|
260 |
|
|
|a New York ;
|a London :
|b Springer,
|c c2010.
|
300 |
|
|
|a 1 online resource (xvii, 544 p.) :
|b ill.
|
336 |
|
|
|a text
|b txt
|2 rdacontent
|0 http://id.loc.gov/vocabulary/contentTypes/txt
|
337 |
|
|
|a computer
|b c
|2 rdamedia
|0 http://id.loc.gov/vocabulary/mediaTypes/c
|
338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|0 http://id.loc.gov/vocabulary/carriers/cr
|
504 |
|
|
|a Includes bibliographical references (p. 535-537) and index.
|
588 |
|
|
|a Description based on print version record.
|
530 |
|
|
|a Available also in a print ed.
|
538 |
|
|
|a Mode of access: World Wide Web.
|
505 |
0 |
|
|a Pt. 1. Opening -- pt. 2. Assertions -- pt. 3. Checkers and assertion libraries.
|
650 |
|
0 |
|a Verilog (Computer hardware description language)
|0 http://id.loc.gov/authorities/subjects/sh90004761
|
650 |
|
0 |
|a Integrated circuits
|x Verification
|x Data processing.
|
650 |
|
7 |
|a TECHNOLOGY & ENGINEERING / Electronics / Circuits / General
|2 bisacsh
|
650 |
|
7 |
|a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated
|2 bisacsh
|
655 |
|
4 |
|a Electronic books.
|
650 |
|
7 |
|a Integrated circuits
|x Verification
|x Data processing.
|2 fast
|0 http://id.worldcat.org/fast/fst00975601
|
650 |
|
7 |
|a Verilog (Computer hardware description language)
|2 fast
|0 http://id.worldcat.org/fast/fst01165388
|
700 |
1 |
|
|a Cerny, Eduard.
|0 http://id.loc.gov/authorities/names/nb97074909
|1 http://viaf.org/viaf/271538942
|
776 |
0 |
8 |
|i Print version:
|t Power of assertions in SystemVerilog.
|d New York ; London : Springer, 2010
|z 9781441965998
|w (OCoLC)646114172
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-1-4419-6600-1
|y SpringerLink
|
903 |
|
|
|a HeVa
|
035 |
|
|
|a (ICU)8896345
|
929 |
|
|
|a eresource
|
999 |
f |
f |
|i 73e8762e-8031-555d-a08b-2362668943ec
|s f4c9773f-5b4a-5e15-8b35-84d57d54d362
|
928 |
|
|
|t Library of Congress classification
|a TK7874.58 .P69 2010
|l Online
|c UC-FullText
|u http://dx.doi.org/10.1007/978-1-4419-6600-1
|z SpringerLink
|g ebooks
|i 11481542
|