The power of assertions in SystemVerilog /

The power of assertions in SystemVerilog /

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Bibliographic Details
Imprint:	New York ; London : Springer, c2010.
Description:	1 online resource (xvii, 544 p.) : ill.
Language:	English
Subject:	Verilog (Computer hardware description language) Integrated circuits -- Verification -- Data processing. Integrated circuits -- Verification -- Data processing. Verilog (Computer hardware description language)
Format:	E-Resource Book
URL for this record:	http://pi.lib.uchicago.edu/1001/cat/bib/8896345

Hidden Bibliographic Details
Other authors / contributors:	Cerny, Eduard.
ISBN:	9781441966001 (electronic bk.) 1441966005 (electronic bk.) 9781441965998 1441965998
Notes:	Includes bibliographical references (p. 535-537) and index. Available also in a print ed. Mode of access: World Wide Web. Description based on print version record.
Other form:	Print version: Power of assertions in SystemVerilog. New York ; London : Springer, 2010 9781441965998

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