Hidden Bibliographic Details
| Other authors / contributors: | Sorin, Daniel J., author.
Hill, Mark D. (Mark Donald), author.
Wood, David Allen, author.
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| ISBN: | 1681737108
9781681737102
9781681737119
1681737116
9781681737096
1681737094
9783031017643
3031017641
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| Notes: | Includes bibliographical references.
Title from PDF title page (viewed on February 28, 2020).
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| Summary: | Many modern computer systems, including homogeneous and heterogeneous architectures, support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the architecturally visible behavior of its memory system. Consistency definitions provide rules about loads and stores (or memory reads and writes) and how they act upon memory. As part of supporting a memory consistency model, many machines also provide cache coherence protocols that ensure that multiple cached copies of data are kept up-to-date. The goal of this primer is to provide readers with a basic understanding of consistency and coherence. This understanding includes both the issues that must be solved as well as a variety of solutions. We present both high-level concepts as well as specific, concrete examples from real-world systems. This second edition reflects a decade of advancements since the first edition and includes, among other more modest changes, two new chapters: one on consistency and coherence for non-CPU accelerators (with a focus on GPUs) and one that points to formal work and tools on consistency and coherence.
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| Other form: | Print version: Nagarajan, Vijay. Primer on memory consistency and cache coherence. Second edition. [San Rafael, Calif.] : Morgan & Claypool Publishers, [2020] 9781681737119
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| Standard no.: | 10.2200/S00962ED2V01Y201910CAC049
10.1007/978-3-031-01764-3
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