Planar test structures for characterizing impurities in silicon /

Planar test structures for characterizing impurities in silicon /

Saved in:

Bibliographic Details
Imprint:	Washington : U.S. Dept. of Commerce, National Bureau of Standards : for sale by the Supt. of Docs., U.S. Govt. Print. Off., 1976.
Description:	v, 25 p. : ill. ; 26 cm.
Language:	English
Series:	Semiconductor measurement technology. National Bureau of Standards special publication ; 400-21 NBS special publication 400-21.
Subject:	Semiconductors -- Testing -- Congresses. Silicon -- Defects -- Congresses. Semiconductors -- Testing. Silicon -- Defects. Conference papers and proceedings.
Format:	U.S. Federal Government Document Print Book
URL for this record:	http://pi.lib.uchicago.edu/1001/cat/bib/268844

Hidden Bibliographic Details
Other authors / contributors:	Buehler, Martin G.
Notes:	"Presented as an invited paper ... at the Large-Scale Integration (LSI) Process Technology/Semiconductor Preparation and Characterization Session of the Electrochemical Society Meeting in Toronto, Canada on May 14, 1975." Includes bibliographical references.
Govt.docs classification:	C 13.10:400-21

Mansueto

Loading map link

Holdings details from Mansueto
Call Number:	QC100.U524 no.400-21
c.1	To check availability consult the series record. Intellectual item Need help? - Ask a Librarian